【Time】June 27th, 2013 (Thursday) 14:00~15:00
【Venue】Room N510, Shunde Building
【Speaker】Dr. Jianbiao Pan, California Polytechnic State University
【Title】A Control-Chart Based Method for Solder Joint Crack Detection
【Abstract】One of the challenges in an experimental study of solder joint reliability is to determine when cracks occur in a solder joint. Cracks in a real solder joint are difficult to identify using an X-Ray system. Cross-sectioning and scanning electron microscopy (SEM) is a destructive method. A common non-destructive test method is to monitor resistance increase in a solder joint or a daisy-chain. However, different failure criteria have been used in different reliability studies, for example, a resistance measurement beyond a particular threshold, a percentage increase in resistance, or a rise in resistance of a specified amount. Thus, it is difficult to compare the results of solder joint reliability from published studies. In addition, the relationship between the crack area of an interconnection and the change in resistance of the interconnection has not been established yet. This talk will present a method based on the control-chart theory for solder joint crack detection. A failure criterion is defined as the resistance increase in a solder joint exceeding k times the range over the natural variation by random cause, which is determined using X-bar and R charts. An experimental study confirmed that a full crack of an interconnection occurs when the increase of resistance in the interconnection is 10 times the natural variation of resistance change. A reliability life comparison for a study on low-silver Ball Grid Array (BGA) solder joints using four different failure criteria will be presented as well.
【Biography】Dr. Jianbiao Pan is a Professor in the Department of Industrial and Manufacturing Engineering at California Polytechnic State University, San Luis Obispo, CA. Dr. Pan's research interest lies in materials, process, thermal management, and reliability of microelectronics and electronic packaging including lead-free soldering and LED packaging. His teaching interests include electronics manufacturing, microelectronics and electronic packaging, statistical data analysis, design and analysis of experiment, quality engineering, and reliability engineering. He is a Fellow of International Microelectronics and Packaging Society (IMAPS), a senior member of IEEE, a senior member of American Society for Quality (ASQ), and a senior member of Society of Manufacturing Engineers (SME). He is an ASQ-Certified Quality Engineer and an ASQ-Certified Reliability Engineer.
Dr. Pan is a recipient of the 2011 Outstanding Educator Award from the IMAPS and the 2004 M. Eugene Merchant Outstanding Young Manufacturing Engineer Award from the SME. He is currently the Editor-in-Chief of Journal of Microelectronics and Electronic Packaging and a Guest Editor of IEEE Transactions on Components, Packaging and Manufacturing Technology.
Dr. Pan received a Ph.D. degree in Industrial Engineering from Lehigh University, Bethlehem, PA, USA, a M.E degree in Manufacturing Engineering from Tsinghua University, Beijing, China, and a B.E. degree in Mechatronics from Xidian University, Xian, China. He worked at the optoelectronics center of Lucent Technologies/Agere Systems as a member of technical staff between 2000 and 2002.
